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NCP3488
OD
DRVH
or
DRVL
t pdlOD
90%
Figure 2. Output Disable Timing Diagram
t pdhOD
10%
IN
t pdlDRVL
t fDRVL
DRVL
90%
2V
10%
10%
90%
t pdhDRVH
t rDRVH
t pdlDRVH
t fDRVH
t rDRVL
DRVH ? SW
90%
90%
10%
2V
10%
t pdhDRVL
SW
Figure 3. Nonoverlap Timing Diagram
APPLICATIONS INFORMATION
Theory of Operation
The NCP3488 is a single phase MOSFET driver designed
for driving two N ? channel MOSFETs in a synchronous buck
converter topology. The NCP3488 will operate from 5 V or
12 V, but it has been optimized for high current multi ? phase
buck regulators that convert 12 Volt rail directly to the core
voltage required by complex logic chips. A single PWM input
signal is all that is required to properly drive the high ? side and
the low ? side MOSFETs. Each driver is capable of driving a
3.3 nF load at frequencies up to 500 kHz.
Low ? Side Driver
The low ? side driver is designed to drive a
ground ? referenced low R DS(on) N ? Channel MOSFET. The
voltage rail for the low ? side driver is internally connected to
the V CC supply and PGND.
High ? Side Driver
The high ? side driver is designed to drive a floating low
R DS(on) N ? channel MOSFET. The gate voltage for the high
side driver is developed by a bootstrap circuit referenced to
Switch Node (SW) pin.
The bootstrap circuit is comprised of an external diode,
and an external bootstrap capacitor. When the NCP3488 is
starting up, the SW pin is at ground, so the bootstrap
capacitor will charge up to V CC through the bootstrap diode
See Figure 4. When the PWM input goes high, the high ? side
driver will begin to turn on the high ? side MOSFET using the
stored charge of the bootstrap capacitor. As the high ? side
MOSFET turns on, the SW pin will rise. When the high ? side
MOSFET is fully on, the switch node will be at 12 volts, and
the BST pin will be at 12 volts plus the charge of the
bootstrap capacitor (approaching 24 volts).
The bootstrap capacitor is recharged when the switch
node goes low during the next cycle.
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